1. Field of the Invention
This invention relates to a method for forming a barrier layer, and more particularly to further utilize a plasma procedure for forming the barrier layer.
2. Description of Related Art
For a structure of metallization in semiconductor, a barrier layer is usually formed between a metal layer and a silicon layer or a dielectric layer in order to avoid a phenomenon in which the metal layer diffuses into the silicon layer or the dielectric layer,. This can also avoid the occurrence of shorts or openings in the metal layer, which result from the phenomena of spiking or electromigration.
FIG. 1A and FIG. 1B are sectional plots schematically illustrating a procedure for fabricating a conventional barrier layer in a metallization structure of semiconductor.
Referring to FIG. 1A, a semiconductor substrate 100 has a metal layer 102 and a barrier layer 104 including TiN sequentially formed under a substrate surface 101. Then, a dielectric layer 106 made from a material such as oxide is formed over the substrate 100. Then, an opening 108a is formed in the dielectric layer 106 by a damascene technology to expose the barrier layer 104. The opening is used for a via window and metal line. Another trench opening 108b is formed by patterning the dielectric layer 106 but without going through it. Next, as shown in FIG. 1B, a barrier layer 110 is formed over the openings 108a, 108b. Then, after filling in the openings 108a, 108b with metal material and applying a planarization process on the substrate 100, a via window 112a, a metal line 112b and a trench plug 112c are formed over the substrate 100.
If the metal material for filling the opening 108a, 108b is copper (Cu), the atoms of copper can diffuse into the dielectric layer 106 at a temperature for a chemical vapor deposition (CVD) process. Therefore, the barrier layer 110 including materials such as TiN or WN is needed in between to avoid the diffusion of copper atoms into the dielectric layer 106.
As described above, even though the barrier layer 110 can stop diffusion, it increases the ohmic contact of the via window 112a, the metal line 112b and the trench plug 112c. Moreover, the conventional structure of the barrier layer also causes some problems when the semiconductor device design is reduced the size. One of problems is that the spaces for the via window 112a, the metal line 112b and the trench plug 112c are getting narrower, which makes it difficult to fill these spaces with metal material.